Vivado EDA
Controls Xilinx Vivado for FPGA development with synthesis, implementation, bitstream generation, and automated diagnostic tools.
Provides 21 tools for controlling Xilinx Vivado EDA through Tcl command execution, covering the complete FPGA development workflow. Includes session management, project creation, synthesis, implementation, and bitstream generation with automatic critical warning diagnostics. Features IO pin verification against XDC constraints, IP parameter inspection, XCI configuration comparison, and structured timing and utilization reports.
Source
Repository: https://github.com/mapleleavessssssss-wq/vivado-mcp
Maintain Vivado EDA?
Let people know it's listed here — add the badge (live metrics, light/dark aware) or a plain link to your README or docs.
[](https://getagentictools.com/mcp/mapleleavessssssss-wq-vivado-mcp?ref=badge) Related mcp
Paddle Billing Enables developers to manage billing operations using natural language commands, streamlining financial API interactions for SaaS
Vaara Runtime evidence layer for EU AI Act compliance — intercepts agent tool calls, scores risks, and writes audit trails.
ScopeBlind MCP security gateway enforcing per-tool policies, rate limits, and approval gates with signed audit receipts.
SAGE Persistent, consensus-validated institutional memory infrastructure for AI agents with BFT validation and confidence scoring.
Actual Budget Integrates with Actual Budget to provide transaction filtering, spending breakdowns by category, monthly summaries with savings ra
PaddleOCR Integrates with PaddleOCR and PP-StructureV3 to extract text from images and PDFs with confidence scores and bounding boxes, plus